Lazy Metro - A Momentary Clock Module, v1.1
Dec 21, 2019 0:50:07 GMT
admin, NightMachines, and 3 more like this
Post by young Protoboard on Dec 21, 2019 0:50:07 GMT
Hi, folks,
If I had to choose, I’d say the NE555 is my favorite IC-- it was the first IC that arrived from Aliexpress in August when I started DIY, so I spent a good three weeks playing around with the NE555 alone. Back then, I had 50, and little else for components, so my inventions were sprawling, expensive, and barbarous-- but RC time constants, discharge rates, flip-flops, spec sheets, all provided a wonderful jumping-off point. Most of these first projects are committed to the archives (nobody needs to see my 3xNE555 VCO, nor should anyone build it), as they simply aren’t useful beyond a platform of exploration.
This design, however, I think has some utility. Meet yPb’s Lazy Metro!
This module was inspired by yoreb in this thread, where they discuss difficulties in starting LFO- clocked modules on a HIGH signal. Effectively, LazyM is a square wave LFO (0-5V) that outputs on a trigger signal or button-press for a specified duration of time, and/or an external gate signal. Importantly, every time the module switches its output state to off, the LFO resets and starts each new cycle on the beginning of a HIGH signal. Additionally, I thought it prudent to add a “Not outputting anything right now” signal, so the second output stays HIGH (5V) when the module yields no output. This should be useful for resetting sequencers, etc.
The LazyM is comprised of two LM555 ICs. (The LM556, a dual LM555 in 14-pin DIP, works just as well; Iwould have used it if I had it in stock during design.) These chips, when combined with an external RC network, provide accurate timing signals-- basically, the 555 controls all of the switching required to begin and end the charging and discharging cycles of a “timing” capacitor. External resistors restrict/set the current flow of the capacitor charging and discharging paths. By restricting current flow to and from the capacitor, the duration of output can be quite precisely controlled. I highly recommend reading this page and the few articles following it for more detailed information on the LM555-- but be careful, as I’ve spotted some typos when referencing pins.
I’d like to describe the relation between the two chips as “serial,” even though I’m not sure if that’s the correct word for it. The first (U1, on schematic) 555 is configured to output on pin 3 a single pulse of specified duration when triggered on pin 2. A negative pulse is required for this, so the TRIG/GATE input gets inverted via the upstream NPN transistor (Q1); the switch wired to ground also provides a manual pulse. Once triggered, the capacitor (C2) begins to charge through the 100k potentiometer (and the 1k “offset” series resistor, which prevents the resistance of the RC network from dropping to 0 and causing difficult behavior). The output to pin 3 also goes HIGH (5V). As detailed further in the linked article, once the timing capacitor reaches a “charged” voltage threshold, U1 flips the output to LOW and discharges C2 by shorting it to ground, resetting the U1 timing behavior. .
Pin 3 on U1 is connected to three loads: Q2 inverts the timed pulse of U1 and provides the described “sequencer reset” function, D1 is an LED indicator for the module’s on/off behavior, and U2 is the creator of the output waveform. Note that the current-limiting resistor values selected for these loads were selected to provide ample current and thus brightness to the LED; alternate values should work just as well. Play around with it until you’re happy with the result-- in fact, that’s the case for ALL passive components in this module, especially those in the RC timing networks. These values were on-hand in plenty, and so they suited me.
Anyways…
U2, the second LM555, is configured as a roughly-even-duty-cycle square wave oscillator whose charging and discharging actions are controlled in part by the output via feedback to the various triggering pins through the RC network. The output of U2 is controlled by the U1 output signal acting on U2’s pin 4, RESET. When held LOW, this reset pin forces U2’s output and timing capacitor (C4) voltage to 0V. So, upon the triggering of U1, U2 begins to output an even duty cycle square wave, starting with a completely discharged timing capacitor. This resetting action provides for the “start with a full HIGH LFO/clock signal” behavior desired. D2 is an LED indicator for the output waveform.
That’s it, really. Some miscellaneous design notes:
- I was trained on the Cadence software package for circuits work-- OrCAD, PSPICE, Capture, etc. It took me LESS time to download KiCAD (~5.6 Gb), learn the absolute basics of Eeschema, and sketch this circuit, than it took for me to create this in what I’ve used for three semesters. The user interface and keyboard shortcuts alone make KiCAD the best ECAD software I’ve used in my short time, so if anyone is looking for recommendations, it’s KiCAD all the way-- and don’t touch Fritzing with a ten-foot pole.
- This is version 1.1. Version 1.0 used an LED indicator and the current-sinking behavior of pin 3 on U1, rather than an NPN transistor, to “invert” U1p3. Another LED was parallel across Q1’s collector to ground. Rather than provide a “true” 0V/5V LOW/HIGH swing, however, these LEDs forced the signaling nodes to be one forward-voltage drop above ground, or about 2-2.5V for these LEDs (not sure off the top of my head). This voltage signal level worked fairly well on the breadboard, and so prototypes were assembled by swapping the bulky LEDs out for 1N4148 diodes without breadboard testing. The 1N4148 has a forward voltage drop of around 0.6V (this varies with input voltage). 0.6V is not nearly enough voltage to provide correct switching behavior, and so the U1 input and the HOLD LOW OUTPUT did not behave as designed. Bottom line: I’ve fixed my prototypes as best as I can, and once my LM556 chips arrive, I’ll rebuild this module to v1.1 standards.
- As noted previously, the component values are flexible and should be selected for the DIYer’s preference-- I personally liked the ~0.1 to ~10 second variable duration of U1, so I chose a 100k pot and 100uF cap, for example.
- Protoboard, while lovely and useful, is limited in its available “circuit density” by THT component sizes and standards. Basically, these circuits are huge compared to SMD modules like AEM and other production electronics. It was very difficult to cram this two-chip circuit onto a 1U module, and I thought that the improper behavior caused by v1.0 LEDs was due to a construction error. I mean, look at this thing on the left; it’s gross:
I was NOT going to try to troubleshoot the errors in that thing, so I built a sort-of 2U version, with notable construction features such as extended power rails, a solid Protoboard front panel for mounting switches, and, well… actual layout and jumper wire planning.
(One of the vestigial version 1.0 1N4148 diodes is visible in the upper-right, just to the left of two output resistors.)
Space for my circuits??? I wasn’t sure how to cope at first. This will definitely be my go-to form factor for prototyping. Smaller, “final” modules can come later, after some practice and polish. My method of connecting the front-panel-mounted button into the rest of the circuit involved some male header pins. This worked just fine, but I think a simple loose wire instead of the pins would assemble easier.
A big design tradeoff here is size vs. functionality. One example is a “rate” switch such as the one found on the AEM LFO; it simply switches between two timing capacitors of different values. Including this function in LazyM’s design is trivially easy, however the space taken by the additional components and inevitable jumper wires has to come at a cost. That cost might be increased difficulty in assembly, or needing another 1U of width on the circuit board. I try to keep with AEM’s small size philosophy, but it’s difficult to do so without making major tradeoffs. But, hey, tradeoffs are just the name of the game when it comes to design.
Thanks for reading! I just bought a very exciting op-amp, so I expect to update the SC/OFF to something more easily produced. The LM555 will rear its beautiful head again soon; I’m toying with a clocked/nonclocked timer-based CV sequencer design that I’m excited about.
yPb
Edited: Spotted an error on schematic; fixed, reuploaded.
If I had to choose, I’d say the NE555 is my favorite IC-- it was the first IC that arrived from Aliexpress in August when I started DIY, so I spent a good three weeks playing around with the NE555 alone. Back then, I had 50, and little else for components, so my inventions were sprawling, expensive, and barbarous-- but RC time constants, discharge rates, flip-flops, spec sheets, all provided a wonderful jumping-off point. Most of these first projects are committed to the archives (nobody needs to see my 3xNE555 VCO, nor should anyone build it), as they simply aren’t useful beyond a platform of exploration.
This design, however, I think has some utility. Meet yPb’s Lazy Metro!
This module was inspired by yoreb in this thread, where they discuss difficulties in starting LFO- clocked modules on a HIGH signal. Effectively, LazyM is a square wave LFO (0-5V) that outputs on a trigger signal or button-press for a specified duration of time, and/or an external gate signal. Importantly, every time the module switches its output state to off, the LFO resets and starts each new cycle on the beginning of a HIGH signal. Additionally, I thought it prudent to add a “Not outputting anything right now” signal, so the second output stays HIGH (5V) when the module yields no output. This should be useful for resetting sequencers, etc.
The LazyM is comprised of two LM555 ICs. (The LM556, a dual LM555 in 14-pin DIP, works just as well; Iwould have used it if I had it in stock during design.) These chips, when combined with an external RC network, provide accurate timing signals-- basically, the 555 controls all of the switching required to begin and end the charging and discharging cycles of a “timing” capacitor. External resistors restrict/set the current flow of the capacitor charging and discharging paths. By restricting current flow to and from the capacitor, the duration of output can be quite precisely controlled. I highly recommend reading this page and the few articles following it for more detailed information on the LM555-- but be careful, as I’ve spotted some typos when referencing pins.
I’d like to describe the relation between the two chips as “serial,” even though I’m not sure if that’s the correct word for it. The first (U1, on schematic) 555 is configured to output on pin 3 a single pulse of specified duration when triggered on pin 2. A negative pulse is required for this, so the TRIG/GATE input gets inverted via the upstream NPN transistor (Q1); the switch wired to ground also provides a manual pulse. Once triggered, the capacitor (C2) begins to charge through the 100k potentiometer (and the 1k “offset” series resistor, which prevents the resistance of the RC network from dropping to 0 and causing difficult behavior). The output to pin 3 also goes HIGH (5V). As detailed further in the linked article, once the timing capacitor reaches a “charged” voltage threshold, U1 flips the output to LOW and discharges C2 by shorting it to ground, resetting the U1 timing behavior. .
Pin 3 on U1 is connected to three loads: Q2 inverts the timed pulse of U1 and provides the described “sequencer reset” function, D1 is an LED indicator for the module’s on/off behavior, and U2 is the creator of the output waveform. Note that the current-limiting resistor values selected for these loads were selected to provide ample current and thus brightness to the LED; alternate values should work just as well. Play around with it until you’re happy with the result-- in fact, that’s the case for ALL passive components in this module, especially those in the RC timing networks. These values were on-hand in plenty, and so they suited me.
Anyways…
U2, the second LM555, is configured as a roughly-even-duty-cycle square wave oscillator whose charging and discharging actions are controlled in part by the output via feedback to the various triggering pins through the RC network. The output of U2 is controlled by the U1 output signal acting on U2’s pin 4, RESET. When held LOW, this reset pin forces U2’s output and timing capacitor (C4) voltage to 0V. So, upon the triggering of U1, U2 begins to output an even duty cycle square wave, starting with a completely discharged timing capacitor. This resetting action provides for the “start with a full HIGH LFO/clock signal” behavior desired. D2 is an LED indicator for the output waveform.
That’s it, really. Some miscellaneous design notes:
- I was trained on the Cadence software package for circuits work-- OrCAD, PSPICE, Capture, etc. It took me LESS time to download KiCAD (~5.6 Gb), learn the absolute basics of Eeschema, and sketch this circuit, than it took for me to create this in what I’ve used for three semesters. The user interface and keyboard shortcuts alone make KiCAD the best ECAD software I’ve used in my short time, so if anyone is looking for recommendations, it’s KiCAD all the way-- and don’t touch Fritzing with a ten-foot pole.
- This is version 1.1. Version 1.0 used an LED indicator and the current-sinking behavior of pin 3 on U1, rather than an NPN transistor, to “invert” U1p3. Another LED was parallel across Q1’s collector to ground. Rather than provide a “true” 0V/5V LOW/HIGH swing, however, these LEDs forced the signaling nodes to be one forward-voltage drop above ground, or about 2-2.5V for these LEDs (not sure off the top of my head). This voltage signal level worked fairly well on the breadboard, and so prototypes were assembled by swapping the bulky LEDs out for 1N4148 diodes without breadboard testing. The 1N4148 has a forward voltage drop of around 0.6V (this varies with input voltage). 0.6V is not nearly enough voltage to provide correct switching behavior, and so the U1 input and the HOLD LOW OUTPUT did not behave as designed. Bottom line: I’ve fixed my prototypes as best as I can, and once my LM556 chips arrive, I’ll rebuild this module to v1.1 standards.
- As noted previously, the component values are flexible and should be selected for the DIYer’s preference-- I personally liked the ~0.1 to ~10 second variable duration of U1, so I chose a 100k pot and 100uF cap, for example.
- Protoboard, while lovely and useful, is limited in its available “circuit density” by THT component sizes and standards. Basically, these circuits are huge compared to SMD modules like AEM and other production electronics. It was very difficult to cram this two-chip circuit onto a 1U module, and I thought that the improper behavior caused by v1.0 LEDs was due to a construction error. I mean, look at this thing on the left; it’s gross:
I was NOT going to try to troubleshoot the errors in that thing, so I built a sort-of 2U version, with notable construction features such as extended power rails, a solid Protoboard front panel for mounting switches, and, well… actual layout and jumper wire planning.
(One of the vestigial version 1.0 1N4148 diodes is visible in the upper-right, just to the left of two output resistors.)Space for my circuits??? I wasn’t sure how to cope at first. This will definitely be my go-to form factor for prototyping. Smaller, “final” modules can come later, after some practice and polish. My method of connecting the front-panel-mounted button into the rest of the circuit involved some male header pins. This worked just fine, but I think a simple loose wire instead of the pins would assemble easier.
A big design tradeoff here is size vs. functionality. One example is a “rate” switch such as the one found on the AEM LFO; it simply switches between two timing capacitors of different values. Including this function in LazyM’s design is trivially easy, however the space taken by the additional components and inevitable jumper wires has to come at a cost. That cost might be increased difficulty in assembly, or needing another 1U of width on the circuit board. I try to keep with AEM’s small size philosophy, but it’s difficult to do so without making major tradeoffs. But, hey, tradeoffs are just the name of the game when it comes to design.
Thanks for reading! I just bought a very exciting op-amp, so I expect to update the SC/OFF to something more easily produced. The LM555 will rear its beautiful head again soon; I’m toying with a clocked/nonclocked timer-based CV sequencer design that I’m excited about.
yPb
Edited: Spotted an error on schematic; fixed, reuploaded.
Could you maybe also post a little (Instagram?) demo video?
